In integrated circuits, interconnectresistance is a combination of wire and via resistance. Wire resistance of a conductor depends on several factors, one of which is the electron scattering at various surfaces and grain boundaries. Via resistance, on the other hand, is a function of the thickness or resistivity of the layers at the bottom of the via through which current must travel.

This comparative animation of 15nm critical dimension (CD) dual damascene structures illustrates how electrons traveling through copper (Cu) encounter numerous grain boundaries and surfaces that cause scattering and higher resistance. As CDs scale below the mean free path of Cu (39nm), electron scattering increases and this causes Cu wire resistance to rise. In addition, the Cu interconnect requires a liner as well as a barrier layer, reducing the volume of Cu and resulting in higher via resistance.

By comparison, the lower mean free path of cobalt (Co) causes less electron scattering, leading to better resistance scaling as CDs approach 10-12nm. Further, only a single, 1nm-thick barrier film is required for Co interconnects, which minimizes via resistance.

Co's lower resistance enables signals to travel faster and for a longer distance. In the race car analogy within the animation, this is represented by the Cu car completing three circuits, whereas the Co car completes four circuits in the same time, thus traveling faster and farther with a given amount of power.

Applied Materials Inc. published this content on 19 May 2017 and is solely responsible for the information contained herein.
Distributed by Public, unedited and unaltered, on 19 May 2017 16:39:10 UTC.

Original documenthttp://blog.appliedmaterials.com/materials-innovation-faster-interconnects

Public permalinkhttp://www.publicnow.com/view/577072A71C1BE2D66085FBD49D1ACF82932D5BC0