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Cadence Design : Tensilica Vision P-Series DSPs are Industry’s First Imaging/Vision DSPs Certified by Khronos as OpenVX 1.1 Conformant

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04/20/2017 | 05:07pm CEST

Cadence Design Systems, Inc. (NASDAQ: CDNS) today announced that the Cadence Tensilica Vision P-Series DSPs are the first imaging/vision DSPs to pass Khronos™ Group's conformance tests for the OpenVX™ 1.1 specification. Application developers can now take advantage of Tensilica Vision P5/P6 functionality without detailed knowledge of the hardware architecture and still achieve high performance. This enables faster development of computer vision and imaging applications on Tensilica Vision P-Series DSPs being deployed in applications processors for mobile, automotive, drone, security, augmented reality/virtual reality (AR/VR) and other markets.

In addition, Cadence released the OpenVX 1.1 Application Programming Kit (APK) for Tensilica Vision DSPs, which is available now. For more information, visit www.cadence.com/go/openvx11.

'Cadence's achievement of OpenVX 1.1 conformance for their Tensilica Vision P5 and P6 DSPs demonstrates their commitment to this open standard for vision processing and continues the momentum that has been building since OpenVX's first release in 2014,' said Neil Trevett, president of the Khronos Group. 'Khronos warmly welcomes Cadence's ongoing contributions to the growth of OpenVX and their advancement of portable computer vision applications.'

Applications developed using the standard OpenVX 1.1 API can be compiled and run on Tensilica Vision DSPs without any code changes. Cadence's OpenVX framework automatically schedules and executes the appropriate DMA transfers for efficient memory access, and runs highly optimized DSP vision-processing kernels in parallel with the DMA transfers. The Khronos OpenVX 1.1 compliance certification ensures that program results are consistent across various OpenVX 1.1 implementations.

'Cadence is the first company to pass OpenVX 1.1 compliance tests using a vision-optimized DSP, and releasing the OpenVX APK is a key milestone in making OpenVX and Tensilica's Vision P-Series DSPs a defacto standard for computer vision, image processing and neural network applications,' said Steve Roddy, senior group director, Tensilica marketing at Cadence. 'Application developers can now reduce application software development time and easily take advantage of the massive parallel processing capability of our Tensilica Vision DSPs. OpenVX empowers application developers to redeploy applications across many different Tensilica processor-powered chips without recoding or re-optimizing their applications.'

Vision-optimized DSPs are rapidly emerging in application-processor-class systems on chip, with three of the top five mobile application processor vendors now offering vision DSPs in their flagship devices. The OpenVX standard enables the deployment of algorithms on these complex, heterogeneous platforms featuring CPUs, GPUs and DSPs. Tensilica Vision P-Series DSPs offer class-leading performance of 256 MACs per cycle in less than 1mm of silicon, delivering higher performance in a smaller area and with lower power than CPU- or GPU-based systems alone.

Developed by the nonprofit, member-funded consortium Khronos Group, OpenVX is an open, royalty-free standard for cross-platform acceleration of computer vision applications. OpenVX enables performance and power-optimized computer vision processing, especially important in embedded and real-time use cases such as face, body and gesture tracking, smart video surveillance, advanced driver assistance systems (ADAS), object and scene reconstruction, augmented reality, visual inspection, robotics and more. Frank Brill, design engineering director at Cadence, is chairman of the OpenVX Working Group.

Cadence presenters will be discussing OpenVX computer vision library standards, as well as techniques to reduce power in embedded deep neural network applications and scalable neural network processors for embedded applications, at the Embedded Vision Alliance Summit being held May 1-3, 2017 at the Santa Clara Convention Center in Santa Clara, Calif. For more information, visit www.cadence.com/go/evs2017.

Cadence Design Systems Inc. published this content on 20 April 2017 and is solely responsible for the information contained herein.
Distributed by Public, unedited and unaltered, on 20 April 2017 15:07:15 UTC.

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Financials ($)
Sales 2017 1 930 M
EBIT 2017 475 M
Net income 2017 262 M
Finance 2017 37,4 M
Yield 2017 -
P/E ratio 2017 35,53
P/E ratio 2018 31,96
EV / Sales 2017 4,74x
EV / Sales 2018 4,39x
Capitalization 9 189 M
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Number of Analysts 9
Average target price 29,7 $
Spread / Average Target -9,8%
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Lip-Bu Tan President, Chief Executive Officer & Director
John B. Shoven Chairman
Geoffrey G. Ribar Chief Financial Officer & Senior Vice President
Neil Kole Chief Information Officer & Senior Vice President
Roger S. Siboni Independent Director
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