By a News Reporter-Staff News Editor at Journal of Engineering -- According to news reporting originating from Alexandria, Virginia, by VerticalNews journalists, a patent by the inventors Anupongongarch, Pin (Shrewsbury, MA); Herrmann, Frederick P. (Sharon, MA), filed on October 7, 2015, was published online on June 13, 2017.
The assignee for this patent, patent number 9679540, is KOPIN CORPORATION (Westborough, MA).
Reporters obtained the following quote from the background information supplied by the inventors: "Vertical scanning of an LCD (Liquid Crystal Display) relates to providing image data to an LCD pixel array. Vertical scan rate refers to the number of times, per unit time, that an LCD pixel array is refreshed (i.e., redrawn). Vertical scanning can be implemented with a shift register-based scanner or an addressable scanner.
"A shift register-base scanner selects each row sequentially, from top-to-bottom or from bottom-to-top. The order of the row selection does not change--only the direction of the sequential section may change.
"An addressable scanner provides more flexibility with image construction, since each row can be selected independently. This feature allows the LCD to do a 'line copying' function, in which the video data on one row can be 'copied' to other rows in a short period of time. This is useful when the same data is to be written, within tight timing constraints, to many rows.
"The copying function relies on storing the video voltage on the column capacitance, and turning on the copied rows one-by-one. Due to leakage that may be associated with the column capacitance, the stored video voltage may change over the time it takes to write to multiple rows. Such a voltage change may result in the rows that are copied later appearing lighter than the rows that are copied earlier."
In addition to obtaining background information on this patent, VerticalNews editors also obtained the inventors' summary information for this patent: "The described embodiments combine the LCD row addressable driving scheme described above with ternary addressing, which allows multiple rows to be turned on at one time. This feature facilitates writing the same data to multiple rows simultaneously. Each row completes the horizontal scanning, and the rows have the same voltage and no difference in appearance.
"In one aspect, the invention is a method of writing image data to a pixel array, including decoding an address and activating, based on the decoded address, two or more row selection signals. The address may be a ternary address having at least one trit. The decoding may be performed by a row selection decoder. The method may further include providing the two or more row selection signals to the pixel array to select two or more rows of the pixel array, the activation of which writes the image data to pixels in the two or more rows of the pixel array.
"One embodiment further includes preventing the at least one trit from occupying the least significant bit position of the address. Another embodiment further includes using the image data for one or more border rows of an image to be displayed on the pixel array.
"In one embodiment, the image is an inset image of a first resolution to be instantiated within an pixel array having a second resolution. The second resolution may be greater than the first resolution. In another embodiment, the image data depicts black border rows of the image.
"One embodiment further includes writing the one or more border rows of the image during a vertical retrace time associated with the image to be displayed on the pixel array.
"Another embodiment further includes providing mask information associated with at least one bit position of the address, wherein the masking data indicates which one of either a binary input or a trit occupies the bit position of the address.
"In one embodiment, when the masking data is in a first state, the binary input occupies the bit position of the address, and when the masking data is in a second state, the trit occupies the bit position of the address. In another embodiment, the masking data indicates two or more bit positions of the address separately, such that the masking data specifies each bit position independent of other bit positions. In yet another embodiment, the masking data indicates two or more bit positions of the address with a common indication, such that the common indication specifies all of the two or more bit positions as being the same.
"In another aspect, the invention is an apparatus for displaying an image, including a pixel array, a row selection decoder configured to decode an address and activate, based on the decoded address, two or more row selection signals, the address being a ternary address having at least one trit. The two or more row selection signals may be provided to the pixel array to select two or more rows of the pixel array, the selection of which writes the image data to pixels in the two or more rows of the pixel array."
For more information, see this patent: Anupongongarch, Pin; Herrmann, Frederick P.. Ternary Addressable Select Scanner. U.S. Patent Number 9679540, filed October 7, 2015, and published online on June 13, 2017. Patent URL: http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=9679540.PN.&OS=PN/9679540RS=PN/9679540
Keywords for this news article include: KOPIN CORPORATION.
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