Mentor Graphics : Silicon Creations Selects Mentor Graphics Software for High-Performance Analog and Mixed-Signal IP Verification

Wilsonville, OR, April 13, 2017 - Mentor, a Siemens business, today announced that Silicon Creations, a leading supplier of high-performance analog and mixed-signal intellectual property (IP), has selected Mentor software for circuit, functional, and physical verification of its complex pre-layout and post-layout analog and mixed-signal IP. Silicon Creations is using the Analog FastSPICE (AFS™) Platform, the Questa® Verification Solution, and the Calibre® family of products to verify their silicon IP portfolio from 180nm to 7nm, including precision and general purpose phase-locked loops (PLLs), Enterprise class SerDes, and high-speed differential IOs.

'We have stringent circuit verification and noise analysis requirements for our precision high-performance analog and mixed-signal IP,' said Randy Caplan, executive vice president at Silicon Creations. 'The AFS Platform is able to consistently demonstrate SPICE-accurate results with extremely fast simulation run times. The AFS device noise analysis delivers silicon-accurate noise analysis for our low-power, high-performance circuits, providing us the confidence that our first silicon will perform as promised and have high production yield.'

'We selected Mentor software, including the AFS Platform, the Questa Verification Solution, and the Calibre product suite because Mentor's products are able to fully address our requirements for circuit and physical verification accuracy, performance, and capacity,' said Mr. Caplan. 'Mentor has become a valuable EDA partner, and we continue to work closely with them as we further advance the state-of-the-art in complex, ultra-low-power, precision analog and mixed-signal IP.'

Silicon Creations uses the complete Calibre Platform for layout verification to ensure their IP designs can be successfully manufactured across multiple process nodes at multiple wafer suppliers. The Calibre nmDRC™ and nmLVS™ tools provide comprehensive physical and circuit verification, while the Calibre design for manufacturing (DFM) products ensure the layout is optimized for the manufacturing process. Silicon Creations uses the Calibre xACT™ parasitic extraction tool to provide accurate parasitic information to the AFS Platform during all steps of IP development, and they leverage the Calibre PERC™ reliability platform to attain the strict electrostatic discharge (ESD) protection and performance reliability requirements that differentiate Silicon Creations offerings.

The AFS Platform provides the world's fastest circuit verification for nanometer analog, radio frequency (RF), mixed-signal, memory, and custom digital circuits. Foundry certified to 7 nm, the AFS Platform delivers nanometer SPICE accuracy five to ten times faster than traditional SPICE, and two to six times faster than parallel SPICE simulators. For large circuits, the AFS Platform delivers greater than 20M element capacity and the fastest mixed-signal simulation. For memory and other array-based circuits, AFS Mega simulation delivers silicon-accurate results with greater than 100M element capacity. To ensure silicon-accurate characterization, it includes the industry's only comprehensive full-spectrum device noise analysis, as well as a high-productivity analog characterization environment product-both of which deliver five to ten times speedup over alternative approaches.

The Questa functional verification solution combines high performance and high capacity with the most comprehensive verification capabilities in the industry. Assertion-based verification (ABV), testbench automation, and coverage-driven verification (CDV) are supported natively by the Questa platform's high-performance assertion engine, a modern high-performance constraint solver, and extensive functional coverage features that include verification management leveraging the Unified Coverage Database (UCDB). Verification of low-power design functionality can be proven in an RTL environment with power-aware functional verification. This full set of advanced verification functionality is enabled by a flexible architecture that delivers unrivaled language and feature support in any design and verification flow.

'Today's leading nanometer mixed-signal semiconductor IP suppliers require state-of-the-art capabilities spanning advanced circuit simulation, functional verification, and physical verification,' said Ravi Subramanian, vice president of the IC Verification Solutions Division in the Deep Sub-Micron business unit, Mentor Graphics. 'We are pleased to see that Silicon Creations, a leading supplier of high-performance nanometer mixed-signal IP, has selected the AFS Platform, the Questa Verification Solution, and the Calibre family of products for its custom analog and mixed-signal verification flows. This selection further validates the value Mentor offers as an essential partner to leaders in the semiconductor and IP industry.'

Contact for journalists

Suzanne Graham
Mentor, A Siemens Business
Phone: 503-685-7789
E-mail: suzanne_graham@mentor.com

Michelle Clancy
PR for Silicon Creations
Phone: 415-682-4552
E-mail: michelle.clancy@cayennecom.com

Mentor Graphics, Mentor, Questa, and Calibre are registered trademarks and AFS, nmDRC, nmLVS, xACT and PERC are trademarks of Mentor Graphics Corporation. All other company or product names are the registered trademarks or trademarks of their respective owner.