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4-Traders Homepage  >  Equities  >  TAIWAN STOCK EXCHANGE  >  Taiwan Semiconductor Mfg. Co. Ltd.    2330   TW0002330008

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Taiwan Semiconductor Mfg : Patent Issued for Lithographic Plane Check for Mask Processing (USPTO 9671685)

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06/15/2017 | 08:07pm CEST

By a News Reporter-Staff News Editor at Electronics Newsweekly -- According to news reporting originating from Alexandria, Virginia, by VerticalNews journalists, a patent by the inventors Lin, Chin-Hsiang (Hsin-Chu, TW); Lee, Heng-Jen (Baoshan Township, Hsinchu County, TW); Huang, I-Hsiung (Hukou Shiang, Hsinchu County, TW); Tu, Chih-Chiang (Tauyen, TW); Chen, Chun-Jen (Renwu Township, Kaohsiung County, TW); Lai, Rick (Taichung, TW), filed on December 22, 2010, was published online on June 6, 2017.

The assignee for this patent, patent number 9671685, is TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. (Hsin-Chu, TW).

Reporters obtained the following quote from the background information supplied by the inventors: "In semiconductor technologies, a plurality of photomasks (masks) are formed with predesigned integrated circuit (IC) patterns. The plurality of masks are used during lithography processes to transfer the predesigned IC patterns to multiple semiconductor wafers. The predesigned IC patterns formed on the masks are master patterns. Accordingly, any photomask defects will be transferred to multiple semiconductor wafers, causing yield issues. High precision processes are therefore utilized during mask fabrication. Though inspection and follow-up repair are implemented to ensure that each mask is fabricated with high quality, existing mask inspection and repair practices are time-consuming and costly. Thus, although existing approaches have been satisfactory for their intended purposes, they have not been entirely satisfactory in all respects."

In addition to obtaining background information on this patent, VerticalNews editors also obtained the inventors' summary information for this patent: "The present disclosure provides for many different embodiments. An exemplary method can include providing a mask fabricated according to a design pattern; extracting a mask pattern from the mask; converting the mask pattern into a rendered mask pattern, wherein the rendered mask pattern includes the design pattern and any defects in the mask; simulating a lithography process using the rendered mask pattern to create a virtual wafer pattern; determining whether any defects in the mask are critical based on the virtual wafer pattern; and repairing any defects in the mask that are determined critical.

"Another exemplary method can include acquiring a scanning electron microscope (SEM) image of a mask fabricated according to a design pattern; extracting a mask pattern from the SEM image; performing inverse image rendering on the mask pattern, such that the mask pattern converts to a rendered mask pattern that includes the design pattern and any mask defects; simulating a wafer pattern using the rendered mask pattern; and determining if any mask defects are critical based on the simulated wafer pattern.

"An exemplary apparatus for implementing the methods described herein can include a mask repair section and a mask defect inspection section in communication with the mask repair section. The mask defect inspection section can extract a mask pattern from a mask fabricated according to a design pattern, convert the mask pattern into a rendered mask pattern that includes the design pattern and any defects in the mask, simulate a lithography process using the rendered mask pattern to create a virtual wafer pattern, determine if any defects in the mask are critical based on the virtual wafer pattern, and notify the mask repair section if the defects are critical."

For more information, see this patent: Lin, Chin-Hsiang; Lee, Heng-Jen; Huang, I-Hsiung; Tu, Chih-Chiang; Chen, Chun-Jen; Lai, Rick. Lithographic Plane Check for Mask Processing. U.S. Patent Number 9671685, filed December 22, 2010, and published online on June 6, 2017. Patent URL: http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=9671685.PN.&OS=PN/9671685RS=PN/9671685

Keywords for this news article include: Electronics, TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.

Our reports deliver fact-based news of research and discoveries from around the world. Copyright 2017, NewsRx LLC

(c) 2017 NewsRx LLC, source Technology Newsletters

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EBIT 2017 395 732 M
Net income 2017 350 641 M
Finance 2017 421 193 M
Yield 2017 3,55%
P/E ratio 2017 15,44
P/E ratio 2018 14,00
EV / Sales 2017 5,04x
EV / Sales 2018 4,44x
Capitalization 5 406 484 M
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NameTitle
Che Chia Wei Co-General Manager & Director
Te Yin Liu Co-General Manager & Director
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