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SK Hynix : "Image Sensor, Semiconductor Device and Image Sensor System" in Patent Application Approval Process

12/17/2014 | 07:48pm US/Eastern

By a News Reporter-Staff News Editor at Electronics Newsweekly -- A patent application by the inventors KIM, Do-Hyung (Gyeonggi-do, KR); MOON, Jang-Won (Gyeonggi-do, KR); LIM, Youn-Sub (Gyeonggi-do, KR); KIM, Do-Hwan (Gyeonggi-do, KR), filed on October 17, 2013, was made available online on December 11, 2014, according to news reporting originating from Washington, D.C., by VerticalNews correspondents.

This patent application is assigned to SK hynix Inc.

The following quote was obtained by the news editors from the background information supplied by the inventors: "Exemplary embodiments of the present invention relate to an image sensor, a semiconductor device for device isolation, and an image sensor system.

"With rapid progress of high speed and high integration of semiconductor devices, demands for miniaturization of patterns and high accuracy of pattern dimensions have increased. The same also applies to device isolation layers occupying a relatively large region as well as patterns formed in active regions.

"In most present semiconductor devices, the device isolation layers are formed using a Shallow Trench Isolation (STI) process to ensure the sizes of active regions and realize high-integrated devices.

"FIGS. 1 to 3 are diagrams illustrating a device isolation configuration of a complementary meta oxide semiconductor (CMOS) image sensor according to the related art.

"Referring to FIG. 1, an insulation structure 12 is formed in a semiconductor substrate 10. The insulation structure 12 may be formed by an STI process, may have a continuous configuration to surround a photodiode 11, and may isolate the photodiode 11 from other photodiodes (not shown).

"The STI process is performed by anisotropically etching the semiconductor substrate 10 to form a trench (not shown), and then filing the trench with an insulation layer (not shown) to form the insulation structure 12. At this time, many dangling bonds existing in an interface between the trench and the insulation structure 12 cause dark current. The dark current becomes a noise signal generated when there is no light in the image sensor. The dark current may deteriorate characteristics of the image sensor in which an optical image is converted into an electric signal.

"In order to resolve the above-mentioned concern, a barrier layer (44a in FIG. 3) is formed between the interface between the trench and the insulation structure 12 by implanting impurity ions into an exposed surface inside the trench after forming the trench to prevent the dark current from occurring and thus enhancing device isolation characteristics.

"FIG. 2 is a plan view illustrating a process of implanting the impurity ions into the exposed surface inside the trench after the trench is formed. FIG. 3 is a plan view illustrating a case in which an annealing process is performed on an impurity region 44 in FIG. 2.

"Referring to FIG. 2, the impurity region 44 is formed by implanting the impurity ions into the exposed surface inside the trench. Referring to FIG. 3, a diffused impurity region 44a is formed by the annealing process on the impurity region 44 to diffuse the impurity ions in the impurity region 44.

"The impurity ions in the impurity region 44 are diffused to the photodiode 11 to form the diffused impurity region 44a. As a result, an area of the photodiode 11 becomes reduced due to the impurity ions diffused to the photodiode 11, thereby resulting in deterioration in image realization characteristics of the CMOS image sensor.

"In detail, diffusion of the impurity ions is unavoidably caused by the annealing process. The impurity ions diffuse into the photodiode 11 and an occupation region of the impurity ions is expanded, so the diffused impurity region 44a is formed. As the occupation region of the impurity ions increases, the region of the photodiode 11 conversely decreases. As a result, the area of the photodiode 11, which receives light, decreases, and, thus, the image realization characteristics of the CMOS image sensor may deteriorate."

In addition to the background information obtained for this patent application, VerticalNews journalists also obtained the inventors' summary information for this patent application: "Various exemplary embodiments are directed to an image sensor, where a loss of a photodiode area is minimized while a dark current source is removed, and a method of fabricating the image sensor. Also, various exemplary embodiments are directed to a semiconductor device, which is capable of realizing excellent insulation characteristics and micro device isolation, and a method of fabricating the semiconductor device.

"In an exemplary embodiment, a semiconductor device may include a substrate, including an active region and an device isolation region, a plurality of micro insulation structures formed in the substrate of the device isolation region and spaced from each other, and an impurity region suitable for filling spaces between the micro insulation structures and surrounding the micro insulation structures in the substrate of the device isolation region.

"In an exemplary embodiment, a method of fabricating a semiconductor device may include forming a plurality of trenches spaced from each other in a substrate, forming a plurality of micro insulation structures by filling the trenches with an insulating material, and forming an impurity region filling spaces between the micro insulation structures and surrounding the micro insulation structures.

"In an exemplary embodiment, an image sensor may include a substrate including an active region and an device isolation region, a photodiode formed in the substrate of the active region, a plurality of micro insulation structures formed in the substrate of the device isolation region and spaced from each other, and an impurity region suitable for filling spaces between the micro insulation structures and surrounding the micro insulation structures in the substrate of the device isolation region.

BRIEF DESCRIPTION OF THE DRAWINGS

"FIG. 1 is a perspective view illustrating a device isolation configuration of a CMOS image sensor according to the related art.

"FIG. 2 is a plan view illustrating a process of implanting impurity ions into a substrate inside a trench.

"FIG. 3 is a plan view illustrating a case in which an annealing process is performed on an impurity region in FIG. 2.

"FIG. 4 is a perspective view illustrating a device isolation configuration of a CMOS image sensor according to an exemplary embodiment.

"FIG. 5 is a plan view illustrating a case in which a process of implanting impurities into an insulation structure in FIG. 4 is performed.

"FIG. 6 is a plan view illustrating a case in which thermal treatment process is performed on an impurity region in FIG. 5.

"FIG. 7 is a sectional view taken along the line A-A' of FIG. 6.

"FIG. 8 is a block diagram illustrating a configuration of an image sensor according to an exemplary embodiment of the present invention.

"FIG. 9 is a block diagram illustrating a system including an image sensor according to the exemplary embodiment of the present invention."

URL and more information on this patent application, see: KIM, Do-Hyung; MOON, Jang-Won; LIM, Youn-Sub; KIM, Do-Hwan. Image Sensor, Semiconductor Device and Image Sensor System. Filed October 17, 2013 and posted December 11, 2014. Patent URL: http://appft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&u=%2Fnetahtml%2FPTO%2Fsearch-adv.html&r=6441&p=129&f=G&l=50&d=PG01&S1=20141204.PD.&OS=PD/20141204&RS=PD/20141204

Keywords for this news article include: Electronics, SK hynix Inc., Semiconductor.

Our reports deliver fact-based news of research and discoveries from around the world. Copyright 2014, NewsRx LLC

(c) 2014 NewsRx LLC

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