By Targeted News Service
ALEXANDRIA, Va., March 12 -- Freescale Semiconductor, Austin, Texas, has been assigned a patent (8,671,381) developed by four co-inventors for a "system for optimizing number of dies produced on a wafer." The co-inventors are Peidong Wang, Suzhou, China, Zhijun Chen, Suzhou, China, Zhihong Cheng, Suzhou, China, and Li Ying, Suzhou, China.
The patent application was filed on Dec. 21, 2012 (13/723,207). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=15&f=G&l=50&co1=AND&d=PTXT&s1=20140311.PD.&s2=%28TX.ASST.%29&OS=ISD/03/11/2014+AND+AS/TX&RS=ISD/03/11/2014+AND+AS/TX
Written by Sudarshan Harpal; edited by Jaya Anand.