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Media Alert: Cadence to Showcase System Design Enablement Innovations at DAC 2018

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06/13/2018 | 04:46pm CEST

Cadence Design Systems, Inc. (NASDAQ: CDNS) plans to demonstrate the latest innovations and solutions in System Design Enablement in booth 1308 at the Design Automation Conference (DAC), June 25-27, 2018 in San Francisco. System and semiconductor developers will see firsthand how Cadence addresses design challenges in conjunction with partners and customers. To learn more about the Cadence® activities at DAC, please visit www.cadence.com/go/dac2018.

WHAT: Cadence is offering a variety of opportunities to learn about the latest trends and interact with technology experts, users and partners. These include:

  • Cadence-hosted luncheon panel events where technology experts, industry veterans and Cadence customers share their visions for solving some of the industry’s most difficult challenges. The luncheons will be held at Moscone Center West, Level 3, Room 3002, and attendees should register in advance at www.cadence.com/go/luncheonreg. The scheduled luncheons are as follows:
    • Smarter and Faster Verification in the Era of Machine Learning, AI and Big Data Analytics, Monday, June 25 at 12:00 p.m., moderated by Ann Steffora Mutschler, executive editor at Semiconductor Engineering.
    • Monster Chips: Scaling Digital Design into the Next Decade, Tuesday, June 26 at 12:00 p.m., moderated by Tom Dillinger, blogger at SemiWiki.
    • Meeting Analog Reliability Challenges Across the Product Life Cycle, Wednesday, June 27 at 12:00 p.m., moderated by Steve Lewis, product management director in the Custom IC & PCB Group at Cadence
  • Cadence in the Design Infrastructure Alley discussing topics related to EDA on the cloud. Cadence will be in booth 1245 in the Design Infrastructure Alley, and Paul Cunningham, corporate vice president and general manager in the System & Verification Group at Cadence, will moderate a panel titled, “EDA on the Cloud: Are we Ready?” on Tuesday, June 26 at 12:30 p.m. in the Design on Cloud Pavilion.
  • The Expert Bar, where industry experts discuss 30 broad technology topics ranging from automotive to mixed signal, advanced node, verification, IP and signoff.
  • The Cadence Theater, highlighting customer and partner experiences using Cadence products and technologies.
  • Cadence conference presentations and panels on a variety of technical topics throughout the duration of the event.
  • The annual Denali® Party by Cadence, where attendees can join industry colleagues to relax, network and enjoy the fun on Tuesday, June 26 from 9:00 p.m. to 1:00 a.m. at Mezzanine, 444 Jessie Street, San Francisco, CA. Register for the party at www.cadence.com/go/denali2018 and pick up your party wristband before noon on Tuesday, June 26 at the Cadence booth.

WHEN: DAC is scheduled for June 25-27, 2018.

WHERE: Moscone Center West in San Francisco, California. Cadence is located in booth 1308.

About Cadence

Cadence enables electronic systems and semiconductor companies to create the innovative end products that are transforming the way people live, work and play. Cadence software, hardware and semiconductor IP are used by customers to deliver products to market faster. The company’s System Design Enablement strategy helps customers develop differentiated products—from chips to boards to systems—in mobile, consumer, cloud datacenter, automotive, aerospace, IoT, industrial and other market segments. Cadence is listed as one of Fortune Magazine’s 100 Best Companies to Work For. Learn more at www.cadence.com.

© 2018 Cadence Design Systems, Inc. All rights reserved worldwide. Cadence, the Cadence logo and the other Cadence marks found at www.cadence.com/go/trademarks are trademarks or registered trademarks of Cadence Design Systems, Inc. All other trademarks are the property of their respective owners.

© Business Wire 2018
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Financials ($)
Sales 2018 2 075 M
EBIT 2018 539 M
Net income 2018 268 M
Finance 2018 295 M
Yield 2018 -
P/E ratio 2018 48,27
P/E ratio 2019 41,05
EV / Sales 2018 5,96x
EV / Sales 2019 5,44x
Capitalization 12 663 M
Duration : Period :
Cadence Design Systems Technical Analysis Chart | CDNS | US1273871087 | 4-Traders
Technical analysis trends CADENCE DESIGN SYSTEMS
Short TermMid-TermLong Term
Income Statement Evolution
Mean consensus OUTPERFORM
Number of Analysts 9
Average target price 46,2 $
Spread / Average Target 2,1%
EPS Revisions
Lip-Bu Tan Chief Executive Officer & Director
Anirudh Devgan President
John B. Shoven Chairman
John Wall Chief Financial Officer & Senior Vice President
Neil Kole Chief Information Officer & Senior Vice President
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