By Targeted News Service
ALEXANDRIA, Va., Aug. 28 -- Mentor Graphics, Wilsonville, Oregon, has been assigned a patent (9,117,044) developed by four co-inventors for "hierarchical verification of clock domain crossings." The co-inventors are Ka-Kei Kwok, Saratoga, California, Priya Viswanathan, Santa Clara, California, Rojer Raji Sabbagh, Ottawa, Canada, and Ramesh Sathianathan, Sunnyvale, California.
The patent application was filed on July 15, 2014 (14/331,434). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=9,117,044.PN.&OS=PN/9,117,044&RS=PN/9,117,044
Written by Amal Ahmed; edited by Jaya Anand.
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