MoSys (NASDAQ: MOSY), a leader in semiconductor solutions that enable fast, intelligent data access for network and communications systems, today announced two new members of its LineSpeed™ 100G PHY family, the 100G Multi-Link Gearbox (MLG) and the Octal 100G Retimer with RS-FEC (Reed Solomon Forward Error Correction). The MSH321 MLG device enables high-density, independent 10GE and 40GE interfaces to be multiplexed into a single 100GE interface. The MSH221 Retimer with 802.3bj 100G RS-FEC enables 4x25G (100G) interfaces to be compliant to the latest 100G IEEE standards and Multi-Source Agreements (MSA) including SR4, CWDM4, PSM4 and others that are specified with FEC.

The MoSys® LineSpeed 100G Octal Retimer with integrated RS-FEC supports up to 4 full duplex lanes (8 channels) with independent rates up to 28 Gbps for high data rate line card applications up to terabits per second (Tbps). This flexible, multi-protocol SerDes device includes an option for the Clause 91 RS-FEC specified in 802.3bj for 4x25G NRZ interfaces. When the RS-FEC is turned off, the MSH221 device functions as a standard multi-rate and multi-protocol retimer capable of passing data whether encoded or non-encoded. Each lane is independent and supports a broad range of frequencies compatible with 10G, 25G, 40G and 100G Ethernet and OTN standards. With the 100G 802.3bj RS-FEC encode, decode and correction functions enabled, the device will encode data in one direction and decode and correct data (if needed) in the other direction. The IEEE 802.3bj RS-FEC standard enables additional signal integrity and/or distance capability over copper or optical interconnects and has been specified in multiple standards and MSAs.

The LineSpeed Multi-Link Gearbox supports both OIF MLG-1.0 and MLG-2.0 standards that aggregate a combination of 10GE and 40GE links, up to 100G total bandwidth, and converts that to a single 100GE (4x25G) link. The difference between the MLG and a standard gearbox based on IEEE 802.3ba is that rather than requiring all 10 lanes to be bonded as 10x10G with zero ppm offset, MLG allows independent 10GE or 40GE lanes, separated by up to +/- 100ppm to be multiplexed into a single 100GE pipe. The MLG device performs all alignment marker insertion and awareness, idle insertion and deletion, and data alignment required by the OIF MLG standards. As physical interfaces on switching and packet processing ICs move to 25G PHY interfaces for performance and board density, the MLG function allows large-scale systems built with these devices to support higher port counts of legacy 10GE and 40GE interfaces.

"We are excited to announce the availability of the retimer and gearbox devices leveraging the 100G RS-FEC and MLG technology," stated John Monson, VP of marketing and sales for MoSys. "These devices will help customers to build equipment that is compliant to the latest 100G industry standards and capable of higher 10G and 40G port densities."

"We see the 100G network and data center infrastructure expanding, driven by the broad availability of the latest silicon and optical module technology," said Loring Wirbel, senior analyst with The Linley Group. "Devices such as MoSys’ latest LineSpeed PHYs, which are on the forefront of supporting OIF MLG 1.0 and 2.0 and which support the latest 100G standards to enable higher 10, 40 and 100G port density, low cost optical modules, and broad interoperability, will be essential to that growth opportunity."

The MoSys LineSpeed 100G Octal Retimer and Multi-Link Gearbox products will be demonstrated at ECOC 2015 in Valencia, Spain. Contact MoSys or visit ECOC stand #725 to book a demo. For information about LineSpeed 100G PHY product availability and pricing, contact a local MoSys sales representative at http://www.mosys.com/contact.php.

About MoSys, Inc.

MoSys, Inc. (NASDAQ: MOSY) is a fabless semiconductor company enabling leading equipment manufacturers in the networking and communications systems markets to address the continual increase in Internet users, data and services. The company's solutions deliver data path connectivity, speed and intelligence while eliminating data access bottlenecks on line cards and systems scaling from 100G to multi-terabits per second. Engineered and built for high-reliability carrier and enterprise applications, MoSys' Bandwidth Engine® and LineSpeed™ IC product families are based on the company's patented high-performance, high-density intelligent access and high-speed serial interface technology, and utilize the company's highly efficient GigaChip® Interface. MoSys is headquartered in Santa Clara, California. More information is available at www.mosys.com.

Bandwidth Engine, GigaChip, and MoSys are registered trademarks of MoSys, Inc. in the US and/or other countries. IC Spotlight, LineSpeed and the MoSys logo are trademarks of MoSys, Inc. All other marks mentioned herein are the property of their respective owners.