Intel Foundry Services (IFS) and Cadence Design Systems, Inc. announced they have expanded their partnership and entered into a multiyear strategic agreement to jointly develop a portfolio of key customized IP, optimized design flows and techniques for Intel 18A technology featuring RibbonFET gate-all-around transistors and PowerVia backside power delivery. Joint customers will be able to accelerate their SoC project schedules on process nodes from Intel 18A and beyond while optimizing for performance, power, area, bandwidth and latency for demanding AI, HPC and premium mobile applications.
Fast-growing market segments, such as AI/ML, HPC and premium mobile computing, require the latest standards in IP to take advantage of advanced packaging and silicon process technologies. Cadence?s leading-edge implementations of trailblazing standards, such as advanced memory protocols, PCI Express, UCI Express and others for these key segments, enable joint customers to achieve scalable, high-performance designs that accelerate their time to market in IFS? most advanced silicon technologies and 3D-IC packaging capabilities. Building a world-class foundry business is key to Intel?s IDM 2.0 strategy, and this agreement strengthens IFS? offerings by making an additional portfolio of essential design tools, flows and interface IP available for foundry customers. It builds on Intel?s engagement with other industry-leading IP providers as it continues to grow the IP ecosystem for IFS customers.