Advantest Corporation will feature its latest test solutions at SEMICON China 2024 on March 20-22 at the Shanghai New International Exhibit Center (SNIEC). In a unique application-based exhibit, Advantest will highlight how its test technology enables innovations in high-performance computing (HPC), AI, automotive, IoT and 5G. Advantest aims to develop test technology that supports a safe, secure and sustainable society, showcasing its sustainability initiatives at this year's event.

AI/HPC: NEW: Pin Scale Multilevel Serial that is both the first native and fully integrated HSIO instrument expanding the V93000 EXA Scale platform to address signaling requirements for advanced communication interfaces. NEW: HA1200, offering die test capability with active thermal control to enable at-speed 100% test coverage before the dies are assembled into 2.5D/3D packages. NEW: 2kW active thermal solution for M487x package handler series, offering thermal control capabilities to enable 100% test coverage for high computing ICs at final test.

Automotive: CREA?s power semiconductor test equipment for a wide variety of power devices, including SiC and GaN power testing on wafer, single-die, substrate, PKG, and module, typically used in industrial and automotive applications. T2000 SoC test systems with Rapid Development Kit (RDK) for all SoCs, including automotive and power analog, and IP Engine 4 test solutions for fastest image processing to reduce CIS testing time and costs. T6391 test system with LCD HP multi-channel digitizer module that addresses high-accuracy and high-voltage measurement demands for testing emerging display driver ICs.

IoT/5G: V93000 Wave Scale millimeter OTA enables far-field/near-field parametric OTA testing for millimeter wave applications (5GNR2, WiGiG, Car Radar). The solution covers multi-site testing for mass production and could be easily integrated into existing test infrastructure. Wave Scale RF, designed for cost-efficient production of 5G and Wi-Fi communication ICs, including WiFi 7 and WiFi 6E devices.

Data Storage and Management: NEW: T5230 memory test system adopts a combined array architecture to reduce test cost for NAND/NVM wafer test, including wafer-level burn-in (WLBI). Wide-ranging DRAM turn-key test solutions, including wafer-level burn-in, DRAM wafer test, core final test, and at-speed interface test. T5830 SSTH memory wafer test system, offering a small economic footprint and full CP test coverage for eFlash/Smart Card and NOR/NAND flash.