Lattice Semiconductorannounced the latest release of its award-winning Lattice Radiant® design software, featuring expanded functional safety and reliability capabilities. Now featuring integration with the latest Synopsys Synplify® FPGA synthesis tool with TMR, Lattice Radiant offers an advanced design automation flow solution that enables designers to more easily develop Lattice FPGA-based applications with the robust functional safety protections, high reliability, and dependable operation required for the Industrial, Automotive, and Avionics markets. Establishing protocols for functional safety and error mitigation compliant with industry standards, namely DO-254, IEC 61508, and ISO 26262, is integral to developing and validating highly reliable and safety-critical designs.

Integrating Lattice Radiant with Synopsys Synplify Triple Modular Redundancy (TMR), automates the required industry practices, specifically addressing the mitigation of soft errors such as Single Event Upsets. The latest Lattice Radiant release includes: Safety Critical Block-Based Design Flow. Interactive Tcl Based Static Timing Analysis enabling faster timing closure.

Multi-bit error injection for Soft Error testing.