HSINCHU,
This silicon-proven GPHY features an
One key feature of this 28nm 4-port Gigabit Ethernet PHY is its impressive 33% reduction in power consumption per port compared to the previous design. Additionally, its advanced DSP (digital signal processing) mitigates signal noise from multi-port crosstalk, improving signal quality with a notable 1-2 dB SNR enhancement compared to Faraday's 40nm 4-port GPHY. This GbE PHY supports various industry-standard protocols, including 1000BASE-T, 100BASE-TX, 10BASE-Te, 100BASE-FX, IEEE 802.3, 802.3u, 802.3ab, and ANSI X3.263-1995 (FDDI-TP-PMD). Furthermore, it seamlessly integrates with UMC's 3.3V and 1.8V I/O, making it an ideal choice for the 28HPC+ low-power SoC platform, ensuring exceptional power efficiency and performance.
'Faraday has facilitated the mass production success of our customers' ASIC projects across a spectrum of networking applications,' said Flash Lin, COO of Faraday. 'By harnessing this GPHY solution, we can help customers to develop next-generation Ethernet-enabled devices and systems with enhanced performance and power efficiency benefits.'
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